This article originally appeared on Weijin Research on Huxiu on August 25, 2026. Original Chinese title: 「长江存储IPO，会是“王者归来”序章吗」. It has been translated and adapted for an English-speaking audience.
At a glance
CXMT has barely warmed the seat of "China's market cap king" before YMTC arrives.
One is the domestic DRAM giant, fourth globally in shipments, with first-quarter revenue of RMB 50.8 billion and net profit attributable to the parent of RMB 26.3 billion, excluding non-recurring items; the other is the domestic NAND giant, third globally in shipments, with revenue of RMB 47 billion in the same period and net profit attributable to the parent of RMB 33.2 billion, excluding non-recurring items. The trillion-dollar market cap club created by this round of AI is highly concentrated in the United States. CXMT is the Chinese company closest to that tier, with a current market cap of roughly USD 560 billion. YMTC may soon have to be counted in as well.
Donut chart of global NAND flash memory shipment share in Q2 2026, led by Samsung at 25%. Source: Counterpoint.
(Source: Counterpoint)
But if CXMT's IPO narrative leans more toward "overtaking on the bend," then YMTC's IPO is more like a "king's return." The reason is that it once even drew level with the very frontier of global NAND technology, only for that to be interrupted later by external variables. Now it must complete its unfinished attempts in technology, market, and ecosystem.
CXMT Wants to Overtake on the Bend with Its IPO
2026/05/18 Read the full article >
As early as 2021, the AI and chip analysis firm SemiAnalysis judged that China had the prospect of achieving self-sufficiency in NAND and influencing the global industry landscape. At the time, what drew the firm's attention was not just a young company founded in 2016, but the fact that this company was not a conventional technology follower. As soon as it was founded, it attempted to rewrite the competitive curve with entirely new architectural innovation.
One of the most fundamental economic metrics of memory chips is per-bit cost. Whether a DRAM or NAND die can be competitive in the market depends to a large extent on how more bits can be packed into a limited wafer area at a limited manufacturing cost.
For NAND, the paths to increasing storage capacity per unit area include: making each memory cell carry more bits; increasing cell density in the X/Y directions; stacking ever more layers along the Z axis; and restructuring the spatial relationship between the memory array and the peripheral circuit.
In the early 2010s, the two-dimensional scaling of planar NAND gradually approached physical limits, and the industry began to turn to 3D NAND. After that, the competition in NAND shifted from who owned the most advanced lithography to who could more effectively deposit, etch, stack, and connect. This also left later entrants a larger space for technological innovation.
One of YMTC's most important technological breakthroughs was being the first to truly advance wafer-level hybrid bonding from a technology reserve into the industrialization of 3D NAND. In simple terms, it prepares the memory array and peripheral circuit wafers in parallel, optimizes them independently, and finally uses hybrid bonding technology to achieve the electrical interconnection.
This is the company's Xtacking technology. Compared with the industry's then-traditional PNC (peripheral circuit adjacent to the memory array) architecture, it can free up the lateral area originally occupied by the peripheral circuit; compared with the PUC (peripheral circuit integrated below the memory array) architecture, it lowers the constraints of manufacturing process compatibility and thermal management.
The bigger benefit of Xtacking is that it decouples the memory array from the logic circuit. This allows the two to each adopt the process best suited to themselves, without having to accommodate each other. What is more, this decoupling also leads to manufacturing parallelization: what was originally one very long serial process chain is split into two process chains that can proceed simultaneously. As the 3D NAND layer count keeps growing, this advantage will be further amplified.
But looking back from 2018, hybrid bonding was not actually an obvious path. It required solving a series of problems including wafer alignment, bonding reliability, process compatibility, and yield. In the short term, it was not necessarily easier than continuing to optimize the traditional architecture. Kioxia later developed its CBA architecture along a similar direction and took it into mass production around 2023; Samsung and SK Hynix have also successively introduced wafer-level hybrid bonding into their next-generation 3D NAND roadmaps.
Evolution of 3D NAND flash memory architectures (PNC, PUC, Xtacking, Multi Wafers Bonding) and a roadmap of Xtacking architecture evolution from 1.0 to 4.0, showing I/O speed versus density.
(Source: the paper "Evolution Trends and Challenges of 3D NAND Flash Technology," SCIENTIA SINICA Informationis, 2025, 55)
Xtacking is a craft that belongs to "manufacturing." Being the first to move a new architecture from the laboratory into the mass production workshop allows learning and innovation through continuous iteration and manufacturing.
Late last year, a YMTC paper reviewed the company's technology evolution and looked ahead to future directions. Its three authors are also all heavyweights. The corresponding author, Huo Zongliang, is the company's CTO and chief scientist, who led the R&D and mass production of the company's first through fifth generation 3D NAND chips. Chen Nanxiang is the chairman of YMTC; Xia Zhiliang is the person in charge of the relevant technology, a former chief engineer at Samsung's research institute.
Putting together the evolution of the several generations of Xtacking in the paper, one sees that it is not a static architecture but a technology route that keeps evolving as NAND layer counts keep climbing. Every generation of technology is a response to a new manufacturing bottleneck.
Xtacking 1.0, for the first time, separated the memory array from the peripheral circuit, verifying and establishing the basic capabilities of heterogeneous integration and wafer bonding, and supported YMTC in achieving mass production of 64-layer products in 2019. The higher the number of layers in a single stack, the greater the process difficulty of a single channel hole etch becomes, so Xtacking 2.0, through a dual-stack architecture, raised the NAND layer count to 128 layers. But the higher the layer count, the more complex the routing becomes; for this reason, Xtacking 3.0 in 2022 innovated a wafer backside signal and power lead-out architecture, laying the foundation for NAND to move toward 232 layers.
Looking only at layer count, the most direct metric, Samsung at that time had just produced a 236-layer customized sample, while SK Hynix's 238-layer product had still not entered mass production. The industry firm TechInsights then tore down this chip at the first opportunity and called YMTC a global leading pioneer (Leading Pioneer).
Also in 2022, at the beginning of the year, YMTC passed Apple's verification and was about to become the third supplier of iPhone flash memory. But by the end of the year, the United States announced tightened export controls on semiconductor equipment used to manufacture NAND of 128 layers and above, and placed YMTC on the Entity List.
This changed the continuity of YMTC's transformation from a technology advantage into a scale advantage, a cost advantage, and a market advantage. Being unable to obtain equipment and materials affected the pace of the continuous iteration of its process architecture, and affected the ability to manufacture the advanced architecture reliably, at scale, and at low cost. This also affected its entry into the high-value US enterprise market, in turn weakening the closed loop of commercial and technological innovation.
At the end of that year, ChatGPT was released, the AI era arrived, and it quickly advanced into the agent era. This redefined the status of the entire memory industry. Whether in the DRAM segment where CXMT operates or the NAND segment where YMTC operates, the memory industry has, because of AI demand, once again become one of the sub-sectors in the semiconductor cycle that attracts the most capital attention and has the greatest profit elasticity. CXMT raced ahead with a lightning listing; YMTC formally launched its IPO process on May 19, passed the acceptance of its pre-IPO counseling on August 19, and had its application accepted for review on August 21.
YMTC has gained an opportunity for a "king's return." Only this time, the crown is much heavier.
What it must win back is not only the technological position that originally belonged to it, but also the capacity, cost, and profit advantages brought by technological leadership; more importantly, what it must change is no longer just its own position in the industry chain, but the distribution of power in the industry chain itself: from being one link in others' supply chains to becoming the core of a supply chain that grows up around itself.
At the technology and mass production level, SK Hynix has advanced to 321 layers, Samsung to 286, and Micron to 276; around 2025, YMTC's Xtacking further iterated to 4.0, introducing a new contact and word line architecture to reduce the area and process footprint of non-memory regions in high-layer-count NAND. Its products currently in mass production have advanced to 267 layers. Soon, the entire industry will enter the era of 300 to 400 layers.
The company plans to raise RMB 33 billion to drive production line upgrades and architecture R&D. The company did not disclose information about Xtacking 5.0 in its prospectus. However, last year, Samsung and YMTC reached a licensing agreement on patents related to hybrid bonding. This at least shows that, as hybrid bonding becomes an important route for next-generation NAND, the patents YMTC has accumulated around Xtacking have become a technology asset that international manufacturers cannot easily bypass; at the same time, YMTC also obtained a cross-license of Samsung's related patents, adding patent headroom for subsequent technology iterations.
Although YMTC says very little about its next steps in the prospectus, it still mentions, in the industry analysis section, the HBF technology that has attracted much attention recently. This is a larger, and more important, market.
The aforementioned paper even makes it explicit at the end that Xtacking is not just a product, but a set of manufacturing capabilities built around wafer-level hybrid bonding; NAND is simply the first vehicle through which this set of capabilities has been commercialized; HBF may be its second growth curve into AI storage. The latter also lies on the extension line of technological capabilities such as hybrid bonding, high-density interconnection, and heterogeneous integration.
Schematic diagram of a high-performance computing chip architecture based on high-bandwidth flash memory, comparing (a) 2.5D and (b) 3D packaging.
(Source: the paper "Evolution Trends and Challenges of 3D NAND Flash Technology")
If the "king's return" is truly realized, then YMTC cannot simply return to the position it should have occupied in 2022, but must enter a new technology and industry cycle carrying the technological capabilities it has accumulated since 2022.
Currently, according to Counterpoint data, YMTC's NAND shipments rank third globally, at about 14%, behind only Samsung's 25% and the combined 22% of SK Hynix and its subsidiaries. However, its revenue still ranks fifth, below Micron and Kioxia. It must sell more bits into higher-value markets. That is the more important challenge of the next phase.
This may also be the leverage value most worth watching in YMTC's IPO. Reports have recently resurfaced that Apple is trying to bring in products from YMTC and CXMT.
But from the perspective of industry history, this is in fact a step that should have been completed in 2022, but was interrupted by export controls. And more importantly, today's YMTC is no longer just a domestic substitute in another country's supply chain; it is becoming a core node in the innovation loop of the local semiconductor ecosystem.
After encountering export controls, YMTC needs key equipment such as high-aspect-ratio etching to continue breaking through at higher layer counts. For local semiconductor equipment makers, what is scarcest is precisely production validation in mass production scenarios. YMTC happens to play a key role at exactly this juncture.
A new ecosystem that the United States did not anticipate is taking shape. Facing the pressure of Chinese memory makers' ever-expanding capacity, Samsung and SK Hynix have also begun to accelerate the upgrade of their NAND capacity in China. Since the beginning of this year, the former has been upgrading 236-layer NAND capacity at its Xi'an plant, and the latter has been introducing 238-layer capacity at its Dalian plant. But their further expansion in China always faces the risk that the "import exemptions" for semiconductor equipment will be canceled or delayed. At the start of this month, Reuters reported that the two companies have already begun testing semiconductor equipment manufactured locally in China.
Perhaps this is YMTC's "king's return" in the true sense of the term. From technological standing, to scale standing, to ecosystem standing, the IPO may be only the prelude to this return.